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Course: S.Y.BCA – Sem 1
(1) Computer Operation
- Introduction
- Computer Organization
- Von Neumann architecture
- Device controller
- Device Interface signals
- I/O Drivers
- CPU operation
- CPU states
- CPU Registers
- Clock
- CPU memory communication
- Instruction format and Instruction cycle
- Macro operation & micro operation
- RTL (Register Transfer Language)
- Instruction set design
- Bus Concept
- Instruction execution
- Interrupts
(2) Data Representation and Digital logic
- Fixed point Numbers
- Representation types
- Sign Extension
- 1�s complement
- 2�s complement
- Floating point Numbers
- IEEE Representation(Only Single precision)
- Normalization
- Excess code
- Gates
- AND
- OR
- NOT
- X-OR
- X-NOR
- NAND
- NOR
- Flip-flops
- R-S
- JK
- D
- T
- Half adder and Full adder
- Encoder and Decoderr
- Multiplexer and Demultiplexer
(3) Memory Organization & Management
- Classification of memory
- By functionality(main, auxiliary, cache, associative, virtual)
- By access(random access, sequential access, semi random)
- By capability(RAM, ROM)
- Memory hierarchy
- Memory parameters
- Main memory Limitation
- Instruction prefetch
- Write Buffer
- Cache memory
- Cache principle
- Cache hit and cache miss
- Mapping( direct, associative, se associative)
- Cache replacement
- Cache write
- Cache coherence
(4) Microprocessors
- Introduction to microprocessors
- Microcontroller
- RISC & CISC Microprocessors
- Scalar & super scalar processors
- Vector & array processors
- Intel 8086
- Pin description
- Operating modes
- Maximum mode pin description
- Minimum mode pin description
- 8086 Register organization
- BIU & EU
- Addressing modes of 8086
- Interrupts
- Introduction to Advanced Microprocessors
- Chronology of Intel processors
- Pentium
- Pentium Pro
- Pentium II
- Pentium III
- Pentium IV
- Itanium
- Latest Intel processors
- Atom
- I3
- I5
- I7
- AMD processors
- MIPS processors
- SUN�s Sparc processor
- Mobile/Tablet processors